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Microchip Technology /ATSAMD21E16BU /NVMCTRL /CTRLB

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Interpret as CTRLB

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SINGLE)RWS0 (MANW)MANW 0 (WAKEONACCESS)SLEEPPRM 0 (NO_MISS_PENALTY)READMODE 0 (CACHEDIS)CACHEDIS

SLEEPPRM=WAKEONACCESS, RWS=SINGLE, READMODE=NO_MISS_PENALTY

Description

Control B

Fields

RWS

NVM Read Wait States

0 (SINGLE): Single Auto Wait State

1 (HALF): Half Auto Wait State

2 (DUAL): Dual Auto Wait State
MANW

Manual Write
SLEEPPRM

Power Reduction Mode during Sleep

0 (WAKEONACCESS): NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access.

1 (WAKEUPINSTANT): NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep.

3 (DISABLED): Auto power reduction disabled.
READMODE

NVMCTRL Read Mode

0 (NO_MISS_PENALTY): The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance.

1 (LOW_POWER): Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time.

2 (DETERMINISTIC): The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings.
CACHEDIS

Cache Disable

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Register License

Copyright © 2018 Microchip Technology Inc.

SPDX-License-Identifier: Apache-2.0

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data